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  • SuperH - Wikipedia
    SuperH (or SH) is a 32-bit reduced instruction set computing (RISC) instruction set architecture (ISA) developed by Hitachi and currently produced by Renesas It is implemented by microcontrollers and microprocessors for embedded systems
  • The SuperH family | Cedric Bail
    The SuperH family was a fascinating family of CPUs It emerged from the understanding of how CISC CPUs allowed for denser code with lower memory bandwidth, giving them an edge over RISC CPUs, despite RISC having the advantage of simpler instruction decoders
  • The SuperH-3, part 1: Introduction - The Old New Thing
    The SH-3 is a 32-bit RISC-style (load store) processor with fixed-length 16-bit instructions The small instruction size permits higher code density than its contemporaries, with Hitachi claiming a code size reduction of a third to a half compared to processors with 32-bit instructions
  • J-core Open Processor
    J-core is a clean-room open source processor and SOC design using the SuperH instruction set, implemented in VHDL and available royalty and patent free under a BSD license
  • SuperH - Renesas Electronics
    SuperH Family was introduced in 1993 as the world’s first single chip 32 bit RISC microcomputer showing adequate performance with little memory source or no cache, which had been thought to be difficult to realize
  • Resurrecting the SuperH architecture [LWN. net]
    The architecture in question is Hitachi's SuperH, whose instruction set was a precursor to one used in many ARM Thumb CPUs But the patents on the most important SuperH designs have all expired—and more will be expiring in the months and years to come—which makes SuperH a candidate for revival
  • Definition of SuperH | PCMag
    A family of RISC-based microcontrollers and microprocessors from Renesas Technology Originally developed by Hitachi in the early 1990s with models designated as SH-1, SH-2, etc , SuperH cores
  • SuperH Interfaces Guide — The Linux Kernel documentation
    SuperH Interfaces Guide Author Paul Mundt DeviceTree Booting Adding a new board to LinuxSH Notes on register bank usage in the kernel Feature status on sh architecture
  • Engineering:SuperH - HandWiki
    SuperH (or SH) is a 32-bit reduced instruction set computing (RISC) instruction set architecture (ISA) developed by Hitachi and currently produced by Renesas It is implemented by microcontrollers and microprocessors for embedded systems
  • Linux for SuperH SoC - spinics. net
    The SuperH (or SH) is brandname of a certain microcontroller and microprocessor architecture The SuperH is fundamentally a 32-bit load store RISC architecture found in a large number of embedded systems The SuperH processor core family was first developed by Hitachi in the early 1990s





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